Printed circuit boards generally include many discrete components, which are interconnected with copper (or other conductive) traces that are photolithographically applied to a substrate on which the components are mounted. The conductive traces are usually defined in at least two layers comprising a plurality of vertical traces in one layer and plurality of horizontal traces in another layer. Electrical signals are conducted between the layers using vias that connect a horizontal trace to a vertical trace through the circuit board. To define a conductive path between two points on the substrate, a computer routing program is normally employed. The program selects portions of the vertical and horizontal conductive traces that will most efficiently (i.e., using the shortest route) provide the required interconnection without interfering with or short circuiting other interconnections that have already been assigned. As necessary, the program lays out "jogged" or "dogleg" paths to accomplish this goal.
Determining how to interconnect a plurality of integrated circuits (ICs) in a multichip module presents a new level of difficulty. A multichip module is an electronic circuit that includes a number of ICs that are disposed directly on a substrate by wire bonding or tape automated bonding (TAB) techniques. By attaching a plurality of ICs to a common substrate in this manner, higher system performance, lower weight, and smaller size can be achieved than is possible with traditional printed circuit boards on which discrete ICs are mounted. Since the number of interconnections between the ICs in a multichip module often number in the thousands, manual routing of conductive interconnections is virtually impossible. Traditional computer assisted circuit board routing techniques would use the area under the ICs for laying out connection paths; however, in multichip modules, the ICs must be mounted directly onto the substrate to insure good thermal conductivity. Therefore, the underlying area is not available to form layers in which conductive traces can be formed and only the areas between the ICs can be used for routing channels.
The input and output terminals of each IC included in a multichip module are connected by very thin fly wires to conductive bond pads located on the substrate using the wire bonding or tape automated bonding operations. The pads are generally aligned with and spaced apart from each side of an IC. In the past, only the areas between the bond pads of adjacent ICs have been used for routing the conductive traces. The areas between the boundaries of each IC and its associated bond pads (each such area comprising a strip at least 50 mils wide) have not been used for interconnection of the pads and have thus been wasted. Ideally, the conventional (central) routing channel, which comprises the area between the bond pads of adjacent ICs, should be as narrow as possible to allow the maximum number of chips to be mounted on a given size substrate. To designers of multichip modules, the total area of the substrate available for mounting ICs is a very valuable commodity; accordingly, the substantial portion of this total area required for interconnecting the integrated circuits should be minimized. As additional area in the central channel between the bonding pads of adjacent integrated circuits is used for interconnections, less of the total area of the substrate is available for mounting ICs.
Accordingly, it is an object of the present invention to provide a multichip module that includes conductive traces disposed in the side channels, which lie between each integrated circuit and its associated bonding pads, so as to maximize chip density on the module. It is a further object of the invention to provide a multichip module including a minimized central channel width. These and other objects and advantages of the present invention will be apparent from the attached drawings and from the Description of the Preferred Embodiments that follows.